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Valiantsin DzerakhandClaude Opus 5.5
97d3762ba1
Comments named the agent task (T1-T7, M2-M5, Task 2.x) that once owned each file or block, and pointed at local notes the repository does not carry (backlog items, milestone plans, research notes). They now say what the code does. gfx_stubs.c held weak stand-ins for functions that every build has defined for a long time. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
109 lines
9.2 KiB
C
109 lines
9.2 KiB
C
// Internal header of the NVN front end, shared by nvn_api_core.c and the other
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// slices (textures, samplers, programs, windows, state objects, command buffers). Adapted from MacNativeGames games/totk/third_party/d2r_gfx/gfx/nvn/hle_nvn.c and nvn_impl.h @ b75be8cf
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// (MIT, Copyright (c) 2026 jhaizhou; origin d2r-mobile).
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#pragma once
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#include <stdint.h>
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#include "gfx.h"
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#include "host.h"
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#include "nvn_obj.h"
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// NVN_API(nvnX) { body }: the strong nvnp_nvnX(Cpu *c); counts the call in gfx_counters, TOTK_TRACE=gfx logs the first.
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#define NVN_API(n) \
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static void nvn_impl_##n(Cpu *c); \
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void nvnp_##n(Cpu *c) { \
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static uint8_t seen; \
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nvn_called(&seen, #n); \
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nvn_impl_##n(c); \
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} \
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static void nvn_impl_##n(Cpu *c)
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void nvn_called(uint8_t *seen, const char *name); // the counting prologue of NVN_API
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#define NVN_LOG(...) do { if (rt_trace & RT_TRACE_GFX) rt_log("nvn: " __VA_ARGS__); } while (0) // TOTK_TRACE=gfx
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// A wait for the GPU, the display or another thread gives the virtual core up until the end of the enclosing scope.
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#define NVN_BLOCKING() __attribute__((cleanup(kern_core_back))) int nvn_away_ = kern_core_away()
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static inline int nvn_arg_bool(const Cpu *c, int i) { return (int)(arg_x(c, i) & 0xff); } // NVNboolean: low 8 bits only
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#define NVN_POOL_MAGIC MAGIC('P', 'O', 'O', 'L') // pool_t.magic of an initialized pool
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#define NVN_VPOOL_PAGE 0x10000ull // NVN virtual mapping granularity (64 KiB)
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static inline int nvn_gpu_only(uint64_t a) { return a - RT_GPU_VA_BASE < RT_GPU_VA_SIZE; } // address in the GPU window
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// A CPU-invisible physical or virtual pool lives in the GPU window: mem is its GPU address (never mapped on the host),
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// game_mem the game's storage (never touched), span the reserved window bytes, host NULL. Every other pool: mem is the
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// game's storage, the GPU address equals the guest address.
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typedef struct { NVNdevice *dev; pool_t *pool; int64_t off; uint64_t size; } buf_builder_t; FITS(buf_builder_t, NVNbufferBuilder);
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typedef struct { uint32_t magic; pool_t *pool; int64_t off; uint64_t size; } buf_t; FITS(buf_t, NVNbuffer);
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typedef struct { // NVNmappingRequest as main passes it (0x28 bytes)
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const NVNmemoryPool *physical_pool; // NULL unmaps
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int64_t physical_offset, virtual_offset;
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uint64_t size;
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int32_t storage_class;
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uint32_t padding;
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} nvn_mapping_t;
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_Static_assert(sizeof(nvn_mapping_t) == 0x28, "NVNmappingRequest stride");
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const pool_t *nvn_pool_find(uint64_t addr, uint64_t len); // GPU-visible pool holding [addr, addr+len], NULL if none
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uint64_t nvn_new_serial(void); // next tex_t / prog_t serial, from 1
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uint64_t nvn_fence_last(void); // fence value of the newest submit (0 before the first)
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int nvn_depth_minus_w(void); // 1 after DeviceSetDepthMode(NEAR_IS_MINUS_W), else 0
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void nvn_guest_written(uint64_t addr, uint64_t size); // the host or the game wrote pool storage: back end re-reads
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// TOTK_TRACE=perf: MemoryPoolFlushMappedRange [0] and BufferFlushMappedRange [1] calls [0] and bytes [1] by the pool's
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// CPU class (0 CPU_CACHED, 1 CPU_UNCACHED, 2 other) since the previous call.
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void nvn_flush_stats(uint64_t out[2][3][2]);
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void nvn_submit_prepare(const uint64_t *handles, int n); // weak no-op; the command-buffer slice reads deferred binds
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// Asynchronous replay: as nvn_submit_prepare, writing the handles to replay to out (a clone where a still queued
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// submission uses the same recording with other deferred binds)
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void nvn_submit_prepare_async(const uint64_t *handles, uint64_t *out, int n);
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int gfx_replay_async(void); // 1: the back end replays submissions on its own thread
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uint64_t gfx_replayed_submits(void); // newest submit number (nvn_submit_count) replayed
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#define NVN_HANDLE_TEX(h) ((int)((h) & 0xfffff)) // combined texture handle = texture id | sampler id << 20
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#define NVN_HANDLE_SAMP(h) ((int)(((h) >> 20) & 0xfff))
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extern GfxStats gfx_counters; // behind gfx_stats(); add with __atomic_fetch_add. frames:
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// the back end's present; nvn_calls/nvn_distinct: NVN_API
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// ---- nvn_api_obj.c: textures, samplers, programs, windows
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#define NVN_TEX_MAGIC MAGIC('T', 'E', 'X', 0) // tex_t.magic of an initialized texture
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#define NVN_SAMP_MAGIC MAGIC('S', 'M', 'P', 0) // samp_t.magic
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#define NVN_PROG_MAGIC MAGIC('P', 'R', 'O', 'G') // prog_t.magic
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#define NVN_WIN_MAGIC MAGIC('W', 'I', 'N', 'D') // win_t.magic
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// The live texture whose storage starts at mem, copied into *out; 0 if none. The game re-initializes transient textures
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// at the same pool memory without registering them again, so a registered serial that was finalized since resolves here.
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int nvn_tex_live_at(const void *mem, tex_t *out);
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// Byte offset of a view's first level and layer inside the texture storage (nvnTextureGetViewOffset); v may be NULL.
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uint64_t nvn_tex_view_offset(const tex_t *t, const view_t *v);
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// ---- nvn_api_cmd.c, nvn_ext.c: command buffers and their replay contract
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// A command handle (what QueueSubmitCommands receives) points at a host copy of one recording: a flat sequence of
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// 8-byte-aligned records {op_hdr, payload}, OP_BEGIN first and OP_END last. Called recordings are inlined, so a copy
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// holds no OP_CALL or OP_JUMP. Texture pointers in payloads (p_set_rt, p_copy_b2t, p_copy_t2t, p_clear_tex) are
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// immutable host copies that live for the run, one per tex_t.serial. Deferred binds (p_bind_handles.src != 0) hold the
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// handles read at submit (nvn_submit_prepare). Payloads of the ops nvn_obj.h does not define:
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typedef struct { volatile uint32_t *val; uint32_t mode, value; } p_signal_event; // OP_SIGNAL_EVENT; mode: NVNeventSignalMode
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typedef struct { uint64_t type, addr; } p_report_counter; // OP_REPORT_COUNTER: NVNcounterType, NVNcounterData address
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typedef struct { uint64_t type; } p_reset_counter; // OP_RESET_COUNTER
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typedef struct { uint64_t src, dst, size; } p_copy_b2b; // OP_COPY_B2B: GPU addresses
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typedef struct { uint64_t dst, size; uint8_t data[]; } p_update_ub; // OP_UPDATE_UB: size bytes written at dst
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typedef struct { int32_t bits, pad; } p_barrier; // OP_BARRIER: NVNbarrierBits
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typedef struct { uint64_t target; } p_jump; // OP_JUMP / OP_CALL: next record / called recording
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// OP_DRAW_IDX_IND: DrawElementsIndirect; ind = GPU address of {count, instances, first index, base vertex, base
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// instance} (VkDrawIndexedIndirectCommand's layout), read by the GPU when the draw runs
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typedef struct { int32_t prim, itype; uint64_t ibuf, ind; } p_draw_idx_ind;
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typedef struct { uint64_t ind, caller; } p_dispatch_ind; // OP_DISPATCH_IND: ind = GPU address of the 3 group counts
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// OP_CLEAR_BUF: size bytes at addr filled with the 32-bit value in GPU order (ClearBuffer; ReportValue is a 4-byte one)
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typedef struct { uint64_t addr, size; uint32_t value, pad; } p_clear_buf;
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_Static_assert(sizeof(p_signal_event) == 16 && sizeof(p_report_counter) == 16 && sizeof(p_copy_b2b) == 24 &&
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sizeof(p_update_ub) == 16, "op payload layouts of hle_nvn.c");
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static inline const op_hdr *nvn_op_first(uint64_t handle) { return (const op_hdr *)(uintptr_t)handle; } // OP_BEGIN
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static inline const op_hdr *nvn_op_next(const op_hdr *h) { return (const op_hdr *)(const void *)((const uint8_t *)h + h->size); }
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static inline const void *nvn_op_payload(const op_hdr *h) { return h + 1; }
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int nvn_handle_live(uint64_t handle); // 1 while the handle's copy exists (its control memory was
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// not added again)
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uint64_t nvn_handle_bytes(uint64_t handle); // bytes of the copy, OP_BEGIN to OP_END; 0 if not live
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uint64_t nvn_submit_count(void); // QueueSubmitCommands calls so far
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const char *nvn_op_name(uint32_t op); // "DRAW_IDX", ...; "?" past OP_COUNT_
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// MemoryPoolInvalidateMappedRange: the CPU is about to read pool storage the GPU wrote. Weak no-op in nvn_ext.c; a back
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// end that renders into host-side copies defines it and writes them back.
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void nvn_pool_invalidate(const pool_t *p, uint64_t off, uint64_t size);
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// MemoryPoolFlushMappedRange: the CPU wrote [mem + off, mem + off + size). Weak no-op in nvn_ext.c; a back end that keeps
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// device-side copies of pool memory (vk_memory.c's VRAM mirror) defines it and copies the range again.
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void nvn_pool_flushed(const pool_t *p, uint64_t off, uint64_t size);
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