mirror of
https://github.com/valentderah/totk-pc-recomp.git
synced 2026-11-11 18:01:03 +00:00
CHEN Feng
34b4faee7c
-march=x86-64-v3 kept the port and the installer to CPUs with AVX2 and FMA. --cpu v2 compiles the generated code and the runtime for SSE4.2 instead. Without FMA3 the FP lowering calls fma/fmaf, so runtime/fma.c provides correctly rounded ones (musl, MIT) that honour MXCSR's rounding mode, FTZ and DAZ; the UCRT's software fallback rounds incorrectly by up to half an ulp. simd.h's fast paths keep their assumptions. The installer's host check asks for x86-64-v2 and selects libtotkrt.a or libtotkrt-v2.a; both release scripts build and ship the pair. The differential tests compile fma.c as well, so a --cflags=-march=x86-64-v2 run tests it. Tested on an i7-3770K (no AVX2, FMA or BMI) with an RTX 3060 Ti, game 1.4.3: the installer ran end to end, --selftest passed and play holds 40-60 fps at 1080p. fma and fmaf matched 152,288 exact vectors over two seeds, including ties, subnormals and every rounding mode, FTZ and DAZ combination. The v3 build is unchanged: fma.c is an empty translation unit there.
277 lines
12 KiB
Python
277 lines
12 KiB
Python
"""Shared parts of the differential tests: Unicorn reference, operand generators, build and run of harness.c.
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Adapted from LAS Recomp tools/test_lift.py and tools/test_simd.py @ da35b83 (MIT, Copyright (c) 2026 Peiikai).
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"""
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import os
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import shutil
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import struct
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import subprocess
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import sys
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from pathlib import Path
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import capstone
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import unicorn as uc
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from unicorn import arm64_const as A
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ROOT = Path(__file__).resolve().parents[2]
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sys.path.insert(0, str(ROOT / 'recomp'))
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BUF, BUF_SIZE = 0x7200000000, 0x40000
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UC_INVALID = (uc.UC_ERR_INSN_INVALID, uc.UC_ERR_EXCEPTION)
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# Record layouts of struct In / struct Out in harness.c.
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IN_FMT = '<QQ32QQQ'
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IN_TAIL = '<QQ'
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OUT_SIZE = 32 * 8 + 4 * 8 + 32 * 16
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MSYS_BIN = Path(r'C:\msys64\ucrt64\bin')
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F32 = [0, 0x80000000, 0x7f800000, 0xff800000, 0x7fc00000, 0xffc00000, 0x7fa00001, 0xff812345, 0x7fd00abc,
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0x00000001, 0x80000001, 0x007fffff, 0x807fffff, 0x00400000, 0x00800000, 0x80800000, 0x00800001, 0x7f7fffff,
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0xff7fffff, 0x3f800000, 0xbf800000, 0x3f000000, 0xbf000000, 0x40000000, 0x40400000, 0x3fc00000, 0xbfc00000,
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0x40200000, 0x40100000, 0x4f000000, 0xcf000000, 0x4f800000, 0x5f000000, 0xdf000000, 0x5f800000, 0x4effffff,
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0x4f7fffff, 0x5effffff, 0x5f7fffff, 0x3effffff, 0x3f7fffff, 0x7effffff, 0x01000000, 0x3e800000, 0x7e800000,
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0x7e7fffff, 0x00200000, 0x001fffff, 0x00200001, 0x47800000, 0x477fe000, 0x477ff000, 0x38800000, 0x33800000,
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0x33000000, 0x387fc000, 0x3f7ff000, 0x46fffe00, 0x80000000 | 0x00200000, 0x7f000000, 0x7f7ffffe]
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F64 = [0, 1 << 63, 0x7ff0000000000000, 0xfff0000000000000, 0x7ff8000000000000, 0xfff8000000000000,
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0x7ff4000000000001, 0xfff0000000012345, 0x7ffc00000abcdef0, 1, (1 << 63) | 1, 0x000fffffffffffff,
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0x0008000000000000, 0x0010000000000000, 0x8010000000000000, 0x7fefffffffffffff, 0xffefffffffffffff,
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0x3ff0000000000000, 0xbff0000000000000, 0x3fe0000000000000, 0x4000000000000000, 0x4008000000000000,
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0x3ff8000000000000, 0xbff8000000000000, 0x4004000000000000, 0x41e0000000000000, 0xc1e0000000000000,
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0x41f0000000000000, 0x43e0000000000000, 0xc3e0000000000000, 0x43f0000000000000, 0x41dfffffffc00000,
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0x41efffffffe00000, 0x43dfffffffffffff, 0x43efffffffffffff, 0x3fdfffffffffffff, 0x7fdfffffffffffff,
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0x7fd0000000000000, 0x0004000000000000, 0x0003ffffffffffff, 0x47efffffe0000000, 0x47efffff00000000,
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0x36a0000000000000, 0x3810000000000000, 0x380fffffffffffff, 0x47f0000000000000, 0x3e70000000000000,
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0x3f0ffc0000000000, 0x40effc0000000000, 0x40effe0000000000, 0x3e6ffffffff00000, 0x369fffffffffffff,
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0x3810000010000000, 0x381000000fffffff, 0x3e80000000000000]
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F16 = [0, 0x8000, 0x7c00, 0xfc00, 0x7e00, 0xfe00, 0x7d00, 0x7e55, 0x0001, 0x8001, 0x03ff, 0x0400, 0x7bff, 0xfbff,
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0x3c00, 0xbc00, 0x3800, 0x4000, 0x3e00, 0x7fff, 0xffff]
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_md = capstone.Cs(capstone.CS_ARCH_ARM64, capstone.CS_MODE_ARM)
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def dis(w, pc=0):
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d = next(_md.disasm(struct.pack('<I', w), pc), None)
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return f'{d.mnemonic} {d.op_str}' if d else '?'
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def mnemonic(w):
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return dis(w).split(' ')[0]
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def rand_lane(r, sz):
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"""Random interesting integer lane of 8 << sz bits."""
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bits_ = 8 << sz
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k = r.random()
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if k < 0.35:
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return r.choice([0, 1, 2, 3, (1 << bits_) - 1, (1 << bits_) - 2, 1 << (bits_ - 1), (1 << (bits_ - 1)) - 1,
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(1 << (bits_ - 1)) + 1, 0x80 % (1 << bits_), 0x7f, bits_ - 1, bits_, bits_ + 1,
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(1 << bits_) - bits_, 1 << (bits_ // 2)])
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if k < 0.5:
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return r.getrandbits(r.randint(1, bits_))
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if k < 0.6:
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return ((1 << bits_) - r.getrandbits(r.randint(1, bits_ - 1))) & ((1 << bits_) - 1)
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return r.getrandbits(bits_)
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def rand_f32(r):
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k = r.random()
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if k < 0.4:
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return r.choice(F32)
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if k < 0.8:
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e = r.choice([r.randint(110, 145), r.randint(0, 255), r.randint(120, 135)])
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return (r.getrandbits(1) << 31) | (e << 23) | (r.getrandbits(23) if r.random() < 0.7 else
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r.getrandbits(4) << 19)
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return struct.unpack('<I', struct.pack('<f', r.choice([r.uniform(-4, 4), float(r.randint(-300, 300)) + 0.5,
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float(r.randint(-5, 5)), r.uniform(-1e6, 1e6)])))[0]
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def rand_f64(r):
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k = r.random()
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if k < 0.4:
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return r.choice(F64)
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if k < 0.8:
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e = r.choice([r.randint(1000, 1050), r.randint(0, 2047), r.randint(1020, 1030), r.randint(0, 40),
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r.randint(2000, 2047), r.randint(860, 920)])
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return (r.getrandbits(1) << 63) | (e << 52) | (r.getrandbits(52) if r.random() < 0.7 else
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r.getrandbits(6) << 46)
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return struct.unpack('<Q', struct.pack('<d', r.choice([r.uniform(-4, 4), float(r.randint(-300, 300)) + 0.5,
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r.uniform(-1e12, 1e12)])))[0]
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def rand_v(r):
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k = r.random()
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out = 0
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if k < 0.3:
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for i in range(4):
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out |= rand_f32(r) << (32 * i)
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elif k < 0.55:
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for i in range(2):
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out |= rand_f64(r) << (64 * i)
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elif k < 0.6:
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for i in range(8):
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out |= (r.choice(F16) if r.random() < 0.5 else r.getrandbits(16)) << (16 * i)
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elif k < 0.9:
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sz = r.randrange(4)
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for i in range(16 >> sz):
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out |= rand_lane(r, sz) << ((8 << sz) * i)
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else:
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out = r.getrandbits(128)
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if r.random() < 0.15: # upper half zero, like most 64-bit results
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out &= (1 << 64) - 1
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return out
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def rand_x(r):
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k = r.random()
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if k < 0.3:
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return r.choice([0, 1, 2, 0xFFFFFFFFFFFFFFFF, 0x7FFFFFFFFFFFFFFF, 0x8000000000000000, 0xFFFFFFFF,
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0x7FFFFFFF, 0x80000000, 0x100000000, 0xFFFFFFFF80000000, 0x8000000000000001, 0xFFFFFF,
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0x1000001, 0x20000000000001, 0xFFFFFFFFFF000001, 63, 64, 31, 32, 0xFF, 0xFFFF])
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if k < 0.45:
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return rand_f32(r) | (r.getrandbits(32) << 32 if r.random() < 0.3 else 0)
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if k < 0.6:
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return rand_f64(r)
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if k < 0.75:
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return r.getrandbits(r.randint(1, 64))
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if k < 0.8:
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return (-r.getrandbits(r.randint(1, 63))) & 0xFFFFFFFFFFFFFFFF
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return r.getrandbits(64)
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def rand_fpcr(r):
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k = r.random()
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if k < 0.55:
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return 0
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v = 0
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if r.random() < 0.4:
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v |= 1 << 25 # DN
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if r.random() < 0.4:
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v |= 1 << 24 # FZ
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if r.random() < 0.4:
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v |= r.randrange(4) << 22 # RMode
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if r.random() < 0.15:
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v |= 1 << 26 # AHP
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return v
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class Emu:
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"""Unicorn as a Cortex-A57, the Switch's CPU, unless another model is given (LSE atomics need
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UC_CPU_ARM64_MAX). Images are (base, bytes) pairs mapped at their guest address."""
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def __init__(self, images, model=A.UC_CPU_ARM64_A57):
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mu = uc.Uc(uc.UC_ARCH_ARM64, uc.UC_MODE_ARM)
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mu.ctl_set_cpu_model(model)
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mu.mem_map(BUF, BUF_SIZE)
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for base, data in images:
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mu.mem_map(base, (len(data) + 0xFFFF) & ~0xFFFF)
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mu.mem_write(base, bytes(data))
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mu.reg_write(A.UC_ARM64_REG_CPACR_EL1, 0x300000) # enable FP/SIMD
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self.mu = mu
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self.xregs = [A.UC_ARM64_REG_X0 + i for i in range(29)] + [A.UC_ARM64_REG_X29, A.UC_ARM64_REG_X30]
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self.qregs = [A.UC_ARM64_REG_Q0 + i for i in range(32)]
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self.out_regs = self.xregs + [A.UC_ARM64_REG_SP, A.UC_ARM64_REG_NZCV, A.UC_ARM64_REG_PC] + self.qregs
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def run(self, pc, fpcr, x, sp, nzcv, v, count=1):
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"""Run count instructions from pc. Returns (x[31], sp, nzcv, pc, v[32])."""
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mu = self.mu
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mu.reg_write_batch(list(zip(self.xregs, x[:31])) + list(zip(self.qregs, v)) +
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[(A.UC_ARM64_REG_SP, sp), (A.UC_ARM64_REG_NZCV, nzcv), (A.UC_ARM64_REG_FPCR, fpcr)])
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mu.emu_start(pc, pc + 4 * count + 4, count=count)
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o = mu.reg_read_batch(self.out_regs)
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return list(o[:31]), o[31], o[32] & 0xF0000000, o[33], list(o[34:])
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def compiler():
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cc = os.environ.get('CC')
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if cc:
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return cc
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if os.name == 'nt' and (MSYS_BIN / 'clang.exe').exists():
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return str(MSYS_BIN / 'clang.exe')
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return shutil.which('clang') or 'clang'
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def build_harness(work, bodies, jobs, cflags):
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"""Compile one C function per test body plus harness.c into work/harness[.exe]."""
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cc = compiler()
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env = dict(os.environ)
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if os.name == 'nt' and MSYS_BIN.exists():
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env['PATH'] = str(MSYS_BIN) + os.pathsep + env.get('PATH', '')
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flags = ['-O1', '-fno-strict-aliasing', '-Wno-unused-label', '-I', str(ROOT / 'runtime')] + cflags.split()
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n = max(1, min(jobs, len(bodies) // 200 + 1))
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per = (len(bodies) + n - 1) // n
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srcs = []
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for j in range(n):
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path = work / f'tests_{j}.c'
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with open(path, 'w') as f:
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f.write('#include "cpu.h"\n')
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for k in range(j * per, min(len(bodies), (j + 1) * per)):
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f.write(f'void t{k}(Cpu *c) {{ {bodies[k]} }}\n')
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srcs.append(path)
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with open(work / 'table.c', 'w') as f:
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f.write('#include "cpu.h"\n')
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f.write(''.join(f'void t{k}(Cpu *c);\n' for k in range(len(bodies))))
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f.write('GuestFn tests[] = {' + ','.join(f't{k}' for k in range(len(bodies))) + '};\n')
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f.write(f'int ntests = {len(bodies)};\n')
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# fma.c: a --cflags=-march=x86-64-v2 run must exercise the software fma the v2 build links, not the C runtime's.
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srcs += [work / 'table.c', ROOT / 'tests' / 'diff' / 'harness.c', ROOT / 'runtime' / 'fma.c']
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objs, procs = [], []
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for s in srcs:
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o = work / (s.stem + '.o')
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objs.append(o)
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procs.append(subprocess.Popen([cc] + flags + ['-c', str(s), '-o', str(o)], env=env))
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if any(p.wait() for p in procs):
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raise SystemExit('compile failed')
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exe = work / ('harness.exe' if os.name == 'nt' else 'harness')
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subprocess.check_call([cc, '-fuse-ld=lld', '-o', str(exe)] + [str(o) for o in objs], env=env)
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return exe
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def write_cases(path, cases, stubs=False):
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"""cases: (k, fpcr, x[31], sp, nzcv, v[32], memchk). stubs: calls go to harness.c's call stub (rt_stub)."""
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with open(path, 'wb') as f:
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for k, fpcr, x, sp, nzcv, v, memchk in cases:
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f.write(struct.pack(IN_FMT, k, fpcr, *(list(x[:31]) + [0]), sp, nzcv))
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for q in v:
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f.write(q.to_bytes(16, 'little'))
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f.write(struct.pack(IN_TAIL, int(memchk), int(stubs)))
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def run_harness(exe, work, buf0, cases, images, stubs=False):
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"""Run the lifted tests. Returns (records, stderr tail or None). images: (base, path) pairs."""
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with open(work / 'buf.bin', 'wb') as f:
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f.write(buf0)
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write_cases(work / 'cases.bin', cases, stubs)
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out = work / 'out.bin'
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args = [str(exe), str(work / 'buf.bin'), str(work / 'cases.bin'), str(out)]
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for base, path in images:
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args += [str(path), f'{base:x}']
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p = subprocess.run(args, capture_output=True)
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err = None if p.returncode == 0 else f'exit {p.returncode:#x}: {p.stderr.decode(errors="replace")[-2000:]}'
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data = out.read_bytes() if out.exists() else b''
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recs = []
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for i in range(len(data) // OUT_SIZE):
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rec = data[i * OUT_SIZE:(i + 1) * OUT_SIZE]
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x = struct.unpack_from('<31Q', rec, 0)
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sp, nzcv, pc, mem = struct.unpack_from('<4Q', rec, 256)
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v = [int.from_bytes(rec[288 + 16 * j:304 + 16 * j], 'little') for j in range(32)]
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recs.append((x, sp, nzcv, pc, mem, v))
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return recs, err
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def diff_state(got, want, check_pc, check_mem, check_nzcv=True):
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"""got: harness record; want: (x, sp, nzcv, pc, v, mem). Returns a list of mismatches."""
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hx, hsp, hnz, hpc, hmem, hv = got
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ex, esp, enz, epc, ev, emem = want
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d = [f'x{j}: got {hx[j]:x} want {ex[j]:x}' for j in range(31) if hx[j] != ex[j]]
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if hsp != esp:
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d.append(f'sp: got {hsp:x} want {esp:x}')
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if check_nzcv and hnz != enz:
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d.append(f'nzcv: got {hnz:x} want {enz:x}')
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if check_pc and hpc != epc:
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d.append(f'pc: got {hpc:x} want {epc:x}')
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if check_mem and hmem != emem:
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d.append('memory differs')
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d += [f'v{j}: got {hv[j]:032x} want {ev[j]:032x}' for j in range(32) if hv[j] != ev[j]]
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return d
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